GSoC 2018. EDA Plugins for Jenkins


Status: Cancelled (student withdrawn)



This project will enable Jenkins to be used as a CI platform for ASIC/FPGA designs.

The desired features of a CI platform for IP cores includes reporting gate count, memory(flop) count and coverage. These plugins will report these values and incremental changes from last check-in. Three plugins will be developed for three EDA tools which will cover the simulation, coverage and synthesis status of the code base.